In many existing semiconductor devices, interlayer dielectrics (ILDs) are formed between different layers of conductors. Subsequent to formation of an ILD, various “backend” processes may be performed to complete the formation of the semiconductor device(s). For example, one backend process includes etching the ILD to create a via for a contact between the semiconductor devices, or between conductors that interconnect various conductive structures in a semiconductor device. Creation of a contact conventionally involves etching the ILD to create the via, and using existing techniques, such as a plasma clean, or argon sputtering, for cleaning the via prior to depositing a barrier metal layer within the via. Such existing techniques, however, lead to an undesirable, high contact resistance. These existing techniques, such as argon sputtering, additionally may induce device damage that causes charge loss in the resulting semiconductor device.